This invention is directed to the patterning of thin film material, and more particularly to patterning such material on the surface of substrate material with a line width less than a micrometer.
Recently an active area in semiconductor fabrication research has been the generation and application of fine lines, or more particularly of fine lines with line widths less than a micrometer. The use of conventional photolithography to attain line widths less than a micrometer has not been successful. Other techniques have been developed using electron beam and X-Ray lithography. While these two techniques have been successful in producing good quality line widths less than a micrometer, the equipment to implement these techniques is quite costly. Consequently, other alternative techniques have been suggested for the production of submicrometer lines.
One such technique uses conventional photolithography and selective edge plating. This technique comprises the use of two layers of metal on the substrate. The top layer is copper and the second layer is chromium. Conventional photolithography is used to produce an edge on the top layer of copper. Gold is then deposited in such a manner that it plates to the edge of the copper layer forming an edge mask. Then the copper layer is removed leaving the gold edge mask on the chromium. The chromium is then selectively removed using plasma etching leaving only the chromium under the gold as an etch mask for further substrate etching. By controlling the plating voltages and other conditions, the width of the gold edge mask is controlled. A similar method using this plating technique involves the use of the copper and chromium layers as before. The copper edge is formed using conventional photolithography but instead of edge plating, immersion plating is issued which results in a one-for-one replacement of the copper atoms with the gold atoms at the edge. The resulting gold etch mask is located in the edge of the copper. See for example a paper by T. N. Jackson and N. A. Masnari entitled "A Novel Submicron Fabrication Technique" published in the International Electronic Device Meeting Technical Abstracts (meeting was held Dec. 1-3, 1979 in Washington, D. C.).
Another technique that has been used to produce submicrometer lines involves a single mask edge etch process. This process requires a single mask layer with an edge so that the mask layer partially covers the substrate. Adjacent to the mask edge and on top of the substrate a passivation layer is deposited. The edge of the mask material is then etched to produce an opening between the passivation layer and the mask layer exposing the substrate. See for example a paper by H. Hosack entitled "Minimum Geometry Etch Windows to a Polysilicon Surface" published in IEEE Transactions on Electron Devices, Vol E025, No. 1, January 1978, page 67.
A different technique for producing submicrometer lines uses a lateral diffusion process. The substrate is covered sequentially with layers of silicon dioxide, polysilicon, silicon nitride and silicon dioxide. The top oxide layer is removed and a portion of the nitride and polysilicon layers are removed in order to form an edge of the nitride and polysilicon layers. Boron is then laterally diffused into the polysilicon. The top nitride layer and undiffused polysilicon are removed. The diffused polysilicon becomes the etch mask. See for example a paper by D. Coe entitled "The Lateral Diffusion of Boron in Polycrystalline Silicon and Its Influence on the Fabrication of Submicron Mosts" published in Solid State Electronics, Vol. 20, pp 985-992, 1977. As to application of this technique to CMOS and SOS technology see also a paper by A. Ipri entitled "Sub-Micron Polysilicon Gate CMOS/SOS Technology" published in the International Electronic Devices Meeting Technical Abstracts (meeting was held Dec. 4-6, 1978 in Washington, D. C.)
An additional technique for producing submicrometer lines involves the use of a shadow deposition method. This method requires that the substrate be coated with a thin layer of aluminum. Then photolithography is used to define an edge of photoresist. A thin layer of titanium is deposited on the photoresist and exposed aluminum layer at an angle to the substrate plane causing the titanium on the aluminum layer to produce an angled edge close to but not connected to the photoresist. The distance between the titanium edge and the photoresist edge is controlled by the amount of titanium deposited and the angle of the deposit. This resulting opening is used with a plasma etch to remove the exposed portion of aluminum beneath the opening. Titanium is then deposited perpendicular to the substrate such that a small portion of titanium is deposited through the opening directly on the substrate surface. The width of this titanium deposit is defined by the width of the opening. The titanium is the etch mask. See for example a paper by E. Jelks et al entitled "A Simple Method for Fabricating Lines of 0.15 Micrometer Width Using Optical Lithography" published in Applied Physics Letters, Vol. 32, No. 1, January 1979, pp 28-30.
It is an object of this present invention to provide a different technique for producing submicrometer line widths on substrates. The disclosed technique would be used when plating, diffusion, or angle deposition is impractical. The disclosed technique would also be used when a line of less than one micron is desired. The disclosed technique is anticipated to have application in high density MOS/LSI.